Early access — RTL/DV live, AI sandbox next

Learn hardware and AI engineering by building it.

Write real code, run it instantly in an isolated sandbox, and see it work. No installs, no licenses, no lab machine — just a browser. Explore free demos, then go deep with graded courses.

Free to start · An account is required to run code

SystemVerilogUVMAssertions / SVAFunctional coverageWaveformsSelf-checking testbenches

The product

A live sandbox, wrapped in things worth learning.

Every engineering domain on Zenzei is built the same way: a real execution sandbox at the centre, free demos to draw you in, and graded courses to take you further. One account covers all of them.

Sandboxes

Real tools running real code in isolation — not a syntax highlighter pretending to compile. Write, run, and inspect the results.

Demos

Ready-to-run designs with nothing to prove. Open one, hit run, break it, and read the waveform. No grading, no pass or fail.

Courses

Structured exercises graded automatically against a real testbench. You write the code; the simulator decides whether it works.

Domains

Chip verification today. More engineering next.

The platform underneath — accounts, content, security, entitlements — is shared. Opening a new domain means adding a sandbox, not rebuilding the product.

RTL / Design Verification

Live

SystemVerilog and UVM on our own simulator — assertions, functional coverage, and waveform dumps included. Demos and graded lessons are live now.

Interactive IDE

Building

A full in-browser workspace — file tree, editor, and an integrated waveform viewer — for when a single-file sandbox is not enough.

AI engineering

Planned

The same demos-and-courses shape, pointed at models instead of silicon. Plus an AI assistant that understands the code you are writing.

Why Zenzei

We build the tools, not just the lessons.

Our own simulator

Zenzei runs on Zenith, a SystemVerilog simulator we develop ourselves. Every engineer who uses the platform makes it better — which is why the sandbox stays free.

One platform, many domains

Hardware today, AI next. One account, one set of progress, one place to learn the engineering disciplines that are converging anyway.

Real code, really executed

Compiles, elaborates, simulates. You get the log, the assertion results, the coverage, and the waveform — the same artifacts you would get from a commercial flow.

Nothing to install

No licence server, no toolchain, no VM. Verification tooling has been locked behind six-figure licences for decades — this is the way in.

How it works

Three steps, no setup.

  1. 01

    Write

    Open a demo or a lesson and edit SystemVerilog in a real code editor, right in the browser.

  2. 02

    Run

    Your code is queued to our simulator, compiled, and executed in an isolated sandbox.

  3. 03

    Explore

    Read the log, check assertions and coverage, and download the waveform to see what actually happened.

Inside

Designs waiting to be run.

A sample of what is in the sandbox today. Create an account to open any of them.

Pricing

Free while we are building.

Everything on Zenzei is free during early access. When paid tiers arrive, individual and community use stays free — we decided that early so there is never a bait-and-switch.

Free

Live

$0 / forever

  • Full simulator access
  • All demos, run and explore
  • Graded lessons
  • Waveform downloads
Create a free account

Team & commercial

Planned

Later

  • CI and batch runs
  • Verification IP library
  • Company licences and seats
  • Priority simulator capacity

Not available yet. Individual use stays free regardless.

Full pricing details and questions

Stop reading about verification. Go run something.

An account takes a few seconds and costs nothing. The simulator is waiting on the other side.

Get started free